The ANX dev module exposes five hardware peripheral interfaces — UART, I2C, SPI, ADC, and PWM — all accessible through the ANX SDK’s C API. Each interface is backed by dedicated hardware in the microcontroller, meaning they operate independently and can run concurrently without blocking each other. The examples below show the minimal configuration required to initialise each peripheral and perform a basic operation; swap in your own pin assignments, speeds, and device addresses as your design requires.
The code examples on this page show the most common configuration for each peripheral. For the complete list of configuration fields, return values, error codes, and advanced options such as DMA transfers and interrupt callbacks, refer to the ANX SDK API Reference included with your SDK installation or available in the developer portal.
UART
The ANX dev module provides two independent hardware UART ports. UART0 is mapped to GPIO0 (TX) and GPIO1 (RX) on the P1 header and is also used for serial logging during development. UART1 is mapped to GPIO30 (TX) and GPIO31 (RX) on the P2 header and is available for communicating with external devices such as GPS modules, GSM modems, or other microcontrollers.Both ports default to 115200 baud and support standard frame formats from 5 to 8 data bits, 1 or 2 stop bits, and none, even, or odd parity. Hardware flow control (RTS/CTS) is available on UART0.If you use UART0 for application data, redirect the SDK’s debug log output to UART1 by calling anx_log_set_port(ANX_UART1) during initialisation to avoid mixing log messages with your data stream.
I2C
The ANX dev module provides two I2C buses. I2C0 is mapped to GPIO2 (SDA) and GPIO3 (SCL) on the P1 header. I2C1 is mapped to GPIO32 (SDA) and GPIO33 (SCL) on the P2 header. Both buses support standard mode at 100 kHz and fast mode at 400 kHz.The SDK operates the module as an I2C controller (master). Add 4.7 kΩ pull-up resistors from SDA and SCL to 3.3 V on your board — the internal pull-ups are weak and unsuitable for reliable communication above short cable lengths.Use ANX_I2C_STANDARD (100 kHz) when working with older or slower peripherals such as EEPROMs and certain RTC chips that do not support fast mode.
SPI
The ANX dev module provides one SPI bus — SPI0 — mapped to GPIO4 (MOSI), GPIO5 (MISO), GPIO6 (CLK), and GPIO7 (CS) on the P1 header. SPI0 supports clock speeds from 100 kHz up to 40 MHz and all four standard SPI modes (mode 0–3).The SDK drives the CS line automatically during transfers when you use the hardware CS pin. If you need to manage multiple SPI devices, drive additional GPIO pins as manual chip selects and assert them yourself before each transfer.Start at a conservative clock speed (1 MHz or lower) when first bringing up a new SPI peripheral. Increase the speed incrementally once you confirm the device responds correctly.
ADC
The ANX dev module includes an 8-channel, 12-bit successive-approximation ADC. The eight channels are mapped to GPIO18 through GPIO25 on the P2 header and accept input voltages in the 0 V to 3.3 V range. The ADC produces readings from 0 to 4095, where 0 represents 0 V and 4095 represents the full-scale 3.3 V reference.Do not apply voltages outside the 0 V to 3.3 V range to the ADC input pins. Negative voltages and voltages above 3.3 V will damage the converter. If your signal source has a different range, use an op-amp scaling circuit to map it to 0–3.3 V before connecting.For more stable readings on noisy signals, oversample by averaging multiple consecutive reads. The SDK provides anx_adc_read_avg(channel, samples) as a convenience function for this pattern.
PWM
The ANX dev module provides four independent hardware PWM channels mapped to GPIO26 through GPIO29 on the P2 header. Each channel supports frequencies from 1 Hz to 1 MHz and a duty cycle from 0% to 100% with 16-bit resolution. All four channels are driven from the same base timer but can be configured to different frequencies if required.Common applications include LED brightness control, DC motor speed regulation, servo control (50 Hz, 1–2 ms pulse width), and generating audio tones.Stop a PWM channel cleanly by calling anx_pwm_stop(ANX_PWM0) rather than simply reconfiguring the duty to 0%. Stopping the channel releases the timer resource and drives the output pin low immediately.